Non-volatile memory systems, such as flash memory devices, have been widely adopted for use in consumer products. Flash memory devices may be found in different forms, for example in the form of a portable memory card that can be carried between host devices or as a solid state disk (SSD) embedded in a host device. When writing data to a conventional flash memory device, a host typically writes data to, and reads data from, addresses within a logical address space of the memory system.
The flash memory device includes an array of floating-gate memory cells and a system controller. The controller manages communication with the host system and operation of the memory cell array in order to store and retrieve user data. In order to increase the degree of parallelism during programming user data into the memory array and reading user data from it, the array is typically divided into sub-arrays, commonly referred to as planes, which contain their own data registers and other circuits to allow parallel operation such that sectors of data may be programmed to or read from each of several or all the planes simultaneously. An array on a single integrated circuit may be physically divided into the planes, or each plane may be formed from a separate one or more flash memory chips.
The memory cells of the flash memory device can be grouped together into pages and blocks. The page is the unit of data programming and reading within a block, containing the minimum amount of data that are programmed or read at one time. However, in order to increase the memory system operational parallelism, such pages within two or more blocks may be logically linked into metapages. A metapage may be formed of one physical page from multiple blocks. So that, the metapage, for example, may include the page in each of the multiple blocks but the pages of a metapage need not necessarily have the same relative position within each of the blocks. A metapage is the maximum unit of programming.
The block is composed of multiple pages with the block being the smallest grouping that is simultaneously erasable. To efficiently manage the memory, blocks may be linked together to form virtual blocks or metablocks. That is, each metablock is defined to include one block from each plane. Use of the metablock is described in U.S. Pat. No. 6,763,424, which is hereby incorporated by reference in its entirety, for all purposes. The metablock is identified by a host logical block address as a destination for programming and reading data. Similarly, all blocks of a metablock are erased together.
Metablock sizes are typically kept smaller in order to comply with various standards. However, a small metablock size reduces the number of planes that can be operated in parallel, thereby increasing the time in which to program the flash memory device. Thus, a need exists to reconcile these issues.